CPUFlow v9.7 and FlashLM Updates Show Lower PPL Does Not Guarantee Coherence

CPUFlow v9.7 and FlashLM updates demonstrate that lower perplexity does not guarantee coherence, with v8 achieving the best PPL of 9.30 but producing incoherent text, while v9.7 offers partial coherence with a 10.23 PPL. The study tested multiple architectures: v5, v7.4, v10 FSP, v8, v9.7, v5‑LN, and v9, each with different parameters and memory mechanisms. Entity‑tracking attempts, such as hard argmax routing and supervised slot routing, failed due to the 2.5 M‑parameter limit, confirming Feng & Steinhardt’s 160 M‑parameter threshold for entity addressing. v9.7 introduced a RAM Net sparse memory side‑path, adding 512 slots with product softmax addressing, which improved coherence without adding a gating loss.

The architecture of v9.7 includes an embedding‑to‑cumsum backbone, six RAMScanBlocks, layer‑norm, and a memory read/write path that merges scan output with memory projection. Sample outputs show named character tracking but still drift after ~100 tokens, indicating partial coherence. The release provides weights on HuggingFace under MIT license, with links for v9.7, v8, v5‑LN, and v9. The findings highlight that reasoning efficiency, not PPL, is the key metric for local models, and that memory expansion can aid coherence.