Evaluating Geekbench 6: ISA‑Specific Performance Insights for Modern CPUs
Benchmark your server with Geekbench 6 to identify ISA‑specific performance bottlenecks, especially around AVX‑512 and AMX, and adjust your build flags accordingly.
Benchmark your server with Geekbench 6 to identify ISA‑specific performance bottlenecks, especially around AVX‑512 and AMX, and adjust your build flags accordingly.
Summary
Geekbench 6 offers a consumer‑friendly benchmark suite that targets ISA‑specific features such as AVX‑512 and AMX, making it a useful tool for evaluating modern CPUs against industry standards like SPEC CPU2017.
The benchmark runs a variety of workloads, including Background Blur, Object Detection, Structure from Motion, and Photo Library, which heavily exercise AVX‑512 and, on Intel’s Granite Rapids, AMX for matrix multiplication. AMX reduces the number of AVX‑2 and AVX‑512 instructions required, yielding a measurable performance boost in Object Detection and Photo Library workloads, though it accounts for only 0.2 % and 0.02 % of executed instructions respectively. Geekbench 6’s IPC distribution skews toward medium‑high IPC, with most workloads exceeding 2 IPC on high‑performance cores like Intel’s Lion Cove and AMD’s Zen 5, while SPEC CPU2017 shows a wider IPC spread and more low‑IPC challenges. Branch‑prediction stress tests reveal that Navigation is the worst‑case workload, with high MPKI that even advanced predictors struggle to mitigate, whereas File Compression and Clang present moderate challenges. Cache‑miss analysis shows that Clang is the only workload that stresses the op‑cache, with Zen 5’s 6 K entries handling most of the instruction stream, while other workloads benefit from small loop buffers. Overall, Geekbench 6 provides a tighter IPC distribution and more predictable branch‑prediction behavior than SPEC CPU2017, making it a valuable tool for fine‑tuning compiler flags and hardware configurations.
Key changes
- Geekbench 6 targets AVX‑512 and AMX, enabling ISA‑specific benchmarking
- AMX reduces AVX‑2/AVX‑512 instruction counts, boosting Object Detection and Photo Library
- IPC distribution skews medium‑high; most workloads >2 IPC on Lion Cove and Zen 5
- Navigation workload has highest MPKI, stressing branch predictors
- Clang workload stresses op‑cache; Zen 5’s 6 K entries handle most instruction stream
- SPEC CPU2017 shows wider IPC spread and more low‑IPC challenges
- Geekbench 6 offers tighter IPC distribution and predictable branch‑prediction behavior
- Benchmarking with Geekbench 6 helps fine‑tune compiler flags and hardware configs